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CHAPTER 3. LAB TASK 1 - INTERFACING TO THE WISHBONE BUS
Preparation task 5
Why do we go through all the trouble inserting the module in Figure 3.8? Why is it so
bad having 2 multipliers in series?
3.4.3 The Test Program dct_sw
For this lab you will get a test program dct_sw.c, written by us. It is a straightforward
implementation of Loeffler’s algorithm and computes the 2-D DCT of an 8 ×8 image.
You will actually find two copies:
in the directory hw/firmware/jpeg for downloading and running on the target
computer. You can also run it on the host computer.
in the directory hw/monitor/firmware/src for simulation. A call to the DCT
program has been inserted in the beginning of the monitor program mon2.c.
3.4.4 A Test Example
a[x, y] =
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24
25 26 27 28 29 30 31 32
33 34 35 36 37 38 39 40
41 42 43 44 45 46 47 48
49 50 51 52 53 54 55 56
57 58 59 60 61 62 63 64
(3.5)
Origo is shown in bold text. The JPEG algoritm includes a subtraction with 128 from
each pixel.
8 · DCT [a 128] =
6112 152 0 16 0 8 0 8
1167 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
122 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
37 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
10 0 0 0 0 0 0 0
(3.6)
3.5 Design a Performance Counter Module
As a last task in this lab you shall design a simple performance counter module, see
Figure 3.1. The module shall:
1. be connected to slave port 9 of the Wishbone bus.
2. have the port definition shown in Listing 3.2.
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