Cypress DCT-1D Uživatelská příručka stáhnout pdf (Strana 42)

CHAPTER 3. LAB TASK 1 - INTERFACING TO THE WISHBONE BUS

macros shown in Listing 3.5 to access memory mapped I/O. These macros are deﬁned

in both the monitor (mon2.h) and in jpeglib.h but if you write a small test program

you might have to include them in your own source code as well. Using these macros

the program from Listing 3.3 would look like whats shown in Listing 3.6.

Listing 3.5: Recommended macros for memory mapped I/O access.

# d e f i n e REG32 ( add ) ∗( ( v o l a t i l e u n s i g n ed l o ng ∗) ( add ) )

# d e f i n e REG16 ( add ) ∗( ( v o l a t i l e u n s i g n ed s h o r t ∗) ( add ) )

# d e f i n e REG8( add ) ∗( ( v o l a t i l e u n s i gn e d char ∗) ( add ) )

Listing 3.6: Correct program, using volatile.

w h i l e ( ( REG32 ( 0 x91000000 ) & 0 x1 ) != 1 ) ; / ∗ Busy w a i t ∗/

3.7.2 What to Include in the Lab Report

The lab report should contain all source code that you have written. (The source code

should of course be commented.) We would also like you to include a block diagram

of your hardware. If you have written any FSM you should include a state diagram

graph of the FSM.

We would also like you to discuss the following questions:

• How did you verify that your computer hardware worked?

• What is the performance of the 2D DCT software? (Try it with and without

caches.)

• How much of the FPGA is used by our design?

And of course, the normal parts of a lab report such as a table of contents, an intro-

duction, a conclusion, etc. The source code that you have written should be included

in appendices and referred to from the main document.

The macros assume that a long is 32 bits, a short is 16 bits and a char is 8 bits.

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Cypress DCT-1D Uživatelská příručka Strana 42